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| AN820 Vishay Siliconix Temperature Sensing Power MOSFET Kandarp Pandya INTRODUCTION Vishay Siliconix temperature-sensing power MOSFETs promote reliability in end products by giving an additional means of protection to power circuitry from current overloads and excessive temperatures. The new devices work by using the falling forward voltage of on-chip diodes to detect increases in device temperature. This voltage is then fed into circuitry allowing the MOSFET to shut off power to the application if excessive temperature is detected. The tab connected to pin 3 serves as the main drain connection. The temperature sensing diodes are terminated as T1 and T2 on pins 2 and 4 respectively. Schematically, the diodes, D1 and D2 are parallel connected. The electrical isolation of these diodes from main MOSFET facilitates non polarized biasing, eliminating the need for any level shifting in the control circuit even when the MOSFET is configured for high-side control. Figure 4 shows basic specifications for the temperature sensing diode. The actual values of the temperature sensing diode's forward voltage drop depend on the forward biasing current. The sensing diode's forward voltage (VFD1 and VFD2) ranges from a minimum of 675 mV to the maximum of 735 mV at the forward bias current (IF) of 250 mA. This variation results from manufacturing tolerances. The forward voltage increase, VF, ranges from a minimum of 25 mV at IF = 125 mA to the maximum of 50 mV at IF = 250 mA. This shows the effect of the bias current. The cumulative effect can be seen in Figure 2, where sensing diode forward voltage is plotted against junction temperature. The forward bias current determines the operating line. The negative temperature co-efficient of forward voltage drop is evident from the slope of the characteristics. The diode drop varies along this line in accordance with the MOSFET junction temperature. DEVICE STRUCTURE Vishay Siliconix temperature-sensing MOSFETs integrate an electrically isolated poly-silicon diode on the same die as the MOSFET (Figure 1). Because the MOSFET and the diode are so close together, the diode temperature tracks the MOSFET temperature. The forward voltage drop of the polysilicon diode is inversely proportional to its own junction temperature and by extension to the junction temperature of the MOSFET. Quantifying this, the temperature coefficient of the forward voltage drops is approximately -2 mV/_C. (Figure 2) Figure 3 shows the data sheet specifications for a typical Vishay Siliconix temperature sensing power MOSFET. This particular device is packaged in a modified 5-pin D2PAK. Gate, drain, and source are located respectively on pins 1, 3, and 5. Sense Diode Forward Voltage vs. Temperature 1.0 0.8 VF (V) @ IF = 250 mA V F (V) 0.6 VF (V) @ IF = 125 mA 0.4 Source A K Source Polysilicon Silicon 0.2 0.0 -50 -25 0 25 50 75 100 125 150 175 TJ - Junction Temperature (_C) FIGURE 1. Structure of a Temperature Sensing Power MOSFET FIGURE 2. www.vishay.com Document Number: 71621 13-Jul-01 1 AN820 Vishay Siliconix D2PAK TO-263, 5 Leads D PRODUCT SUMMARY T1 V(BR)DSS (V) 20 Notes: a. Package limited. rDS(on) (W) 0.012 @ VGS = 10 V 0.015 @ VGS = 4.5 V ID (A) 60a 60 12345 G T2 D1 D2 S G T1 D T2 S N-Channel MOSFET FIGURE 3. Basic Specifications MOSFET SPECIFICATIONS (TJ =25_C UNLESS OTHERWISE NOTED) Parameter Static VFD1 Sense Diode Forward Voltage Sense Diode Forward Voltage Increase Forward TransconductanceNO TAG VFD2 DVF gfs IF = 250 mA IF = 250 mA From IF = 125 mA to IF = 250 mA VDS = 15 V, ID = 20 A 675 675 25 35 735 735 50 S mV Symbol Test Condition Min Typ Max Unit FIGURE 4. Sense Diode Specifications DESIGN EXAMPLE In the following design example, a simple comparator circuit utilizes the diode's forward voltage drop to sense the MOSFET junction temperature and implement self-protection of the MOSFET against overtemperature in a control circuit. Figure 5 is a load switch controlling a floating load on the high side using the SUB60N04-15LT temperature-sensing power MOSFET. +12 V +5 V C2 0.1 mF R1 200 kW 1% C3 0.1 mF R5, 18 kW IC1, LMV321 C1 560 pF R7 2.4 kW 1% - + R6, 560 W Gate Output Signal R4, 560 kW, 1% R3, 18 kW INPUT R2 22 kW 1% Signal Ground SUB60N04-15LT Power Ground Document Number: 71621 13-Jul-01 FIGURE 5. Schematic Diagram www.vishay.com 2 AN820 Vishay Siliconix Design Criteria used are as follows: (a) Functional requirements D 5-V logic-level signal at the input terminal biases the polysilicon diode with IF = 250 mA and turns on the MOSFET D Protection circuit turns off the MOSFET before its junction temperature reaches maximum permitted limit of 175_C D Protection circuit enables cyclic turn-on and turn-off under continuous overload or short circuit conditions, without allowing the junction temperature to exceed the maximum permissible limit (b) Assumptions D 5-V logic-level power supply (VLL) for the control circuit is independent of overload or shorted load on the MOSFET side D Power supply source on load side is capable of supplying continuous overload/short circuit current D The conducting paths on the PC board, around the load, and the power supply are capable of carrying short circuit currents The basic circuit configuration is the same for any Vishay Siliconix temperature sensing power MOSFET. However, to obtain the desired trip points, the values of the following components must be selected and or caluculated: D Resistor R3 to set the poly-diode bias current D Resistors R4 and R7 to set the hysteresis voltage D Resistors R1 and R2 to set the reference voltage [R7 / (R7 + R4)] = VHYS / VOUT = 20 mV / 4.8 V By selecting a value of 560-kW for resistor R4, we ensure that less than 10 mA is used in the feedback loop and most of the op-amp output current is available for the gate drive. Substituting the value of resistor R4 in the equation [R7 / (R7 + R4)] = 20 mV / 4.8 V [R7 / (R7 + 560 kW)] = 20 mV / 4.8 V resistor R7 = 2.4 kW When op-amp output is low VHYS = [R7 / (R7 + R4)] x VOUT = [2.4 kW / (2.4 kW + 560 kW)] x <0.2 V = <1 mV, negligible. Step 5 Determine reference voltage VREF. The VREF sets the trip point used by the op-amp comparator. Select the maximum trip temperature TJ = 170_C, which is less than 175_C, the maximum temperature rating of the device. As shown in Figure 6, now create new set of curves for maximum and minimum VFD vs. TJ and VFD + VHYS vs. TJ using the following datasheet information: Use the slope of the curve VFD vs. TJ at IF = 250 mA (Figure 2). Use the maximum and the minimum values of VFD at IF = 250 mA (Figure 4). Superimpose the value of hysteresis voltage, VHYS = 20 mV from Step 3, to create the curves for VFD(max) + VHYS vs. TJ and VFD(min) + VHYS vs. TJ. (Figure 6). www.vishay.com A temperature coefficient of -2 mV/_C translates into a voltage hysteresis of VHYS = 20 mV. This is adequate to ensure jitter free, snap-action turn-on and turn-off of the power MOSFET. Step 4 Calculate values of resistors R4 and R7 using the following equation: VHYS = [R7 / (R7 + R4)] x VOUT When the op-amp output is high, VOUT = 4.8 V Hence, Design calculations (Refer to Figure 5): Step 1 Select the polysilicon diode bias current: IF = 250 mA Step 2 Resistor R3 establishes the polysilicon diode bias current as follows: R3 = (VLL - VF @ 25_C) / IF = (5 V - 0.7 V) / 250 mA = 18 kW Step 3 Select temperature hysteresis: 10_C Document Number: 71621 13-Jul-01 3 AN820 Vishay Siliconix VFD(max) 735 mV @IF = 250 mA VHYS = 20 mV VFD(min) 675 mV VFD(min) + VHYS @ 135_C 510 mV VHYS = 20 mV VREF 490 mV VHYS = 20 mV VFD(min) @ 135_C 470 mV VFD(max) @ 170_C 470 mV VFD(max) + VHYS @ 170_C 510 mV 25_C 125_C 135_C Junction Temperature (_C) 160_C 170_C FIGURE 6. Maximum and Minimum VFD vs. TJ and Maximum and Minimum VFD + VHYS Curves To ensure that maximum trip temperature equals 170_C, determine the voltage where VFD(max) + VHYS intersects 170_C in Figure 6. This is the value of the reference voltage, VREF = 490 mV. Also determine the temperature where VFD(min) + VHYS intersects VREF. This is the minimum trip temperature, or 135_C. The following equation defines the value of the voltage divider components, resistors R1 and R2: VREF = [VCC / (R1 + R2)] x R2 Hence, (R1 + R2) / R2 = VCC / VREF = 5 V / 490 mV Now select the resistor R1 = 200 kW Substituting the value of R1 in the above equation, resistor R2 = 22 kW Step 6 The value of resistor R5 = 18 kW is selected to facilitate monitoring of gate output signal without loading the op-amp output. The value of resistor R6 = 560 W ensures adequate gate current. More importantly, R6 provides isolation between the MOSFET and the op-amp in case of catastrophic failure from either side. www.vishay.com Step 7 The values of capacitors C1, C2, and C3 are chosen to provide necessary noise immunity. CIRCUIT OPERATION Let us assume that the forward voltage drop for the device in use is at the maximum value, i.e., VFD(max) = 735 mV at 25_C and IF = 250 mA. (a)Normal Condition (i) MOSFET "OFF" The logic-level low at the input can't bias the sense diode adequately. The resulting forward diode voltage drop, VFD, is much lower than the reference voltage VREF = 490 mV, established by voltage divider resistors R1 and R2. The op-amp output remains low. The gate drive is not available for the MOSFET, which remains in the off state. (ii) MOSFET "ON" The logic-level high, i.e. 5 V at the input, provides a bias current of IF = 250 mA for the sense diode through resistor R3. Under normal conditions, the resulting VFD is greater than VREF. The op-amp output switches to high state, i.e. VOUT = 4.8 V. This is the logic level gate drive to turn on the MOSFET. Document Number: 71621 13-Jul-01 4 AN820 Vishay Siliconix In addition, the 4.8 V on the op-amp output provides a hysterisis voltage VHYS = 20 mV, by means of positive feedback derived through resistors R4 and R7. The signal at the non-inverting, `+' input of the op-amp is a superposition of VFD(max) and VHYS. Thus the op-amp compares VREF against VFD(max) + VHYS. (b) Fault Condition The fault condition arises only when the MOSFET is on, and when any one or more of the following conditions are present: (1) overload, (2) short-circuited load, (3) overvoltage, or (4) inadequate gate drive. The MOSFET junction and sense diode temperature rise. VFD(max) drops with the rise in the diode/MOSFET junction temperatures. Effectively, the voltage at the non-inverting, `+' input of the op-amp, VFD(max) + VHYS, drops (Figure 7). The op-amp output switches to the low state when VFD(max) + VHYS drops below VREF. The MOSFET switches off before its junction temperature exceeds the rated temperature of 175_C. (c) Cyclical operation under fault conditions Now, with MOSFET turned off, the VHYS is removed. The operation shifts from the VFD(max) + VHYS curve to the VFD(max) curve only (Figure 7). This shift ensures jitter free turn-off as the VREF = 490 mV is now compared with only VFD(max) = 470 mV at TJ = 170_C. Since there is no current flow, the MOSFET die cools down, the diode temperature starts dropping back towards ambient, and the voltage VFD(max) rises from 470 mV. When VFD(max) = VREF = 490 mV at TJ = 160_C, the MOSFET turns on again. The operation shifts from VFD(max) to the VFD(max) + VHYS path. Again, the shift results from addition of the hysterisis voltage and provides jitter free turn-on. This time VHYS = 20 mV is added to VFD(max) = 490 mV. Now the VREF = 490 mV is compared with VFD(max) + VHYS = 490 + 20 = 510 mV. The prevailing fault condition leads to a rise in junction temperature and voltage drop in VFD(max) + VHYS. The cycle repeats as long as the fault condition exists. Cyclical operation under fault conditions is highlighted with arrow-headed traces in Figure 7. Two sets of curves describe the difference in the circuit behavior with respect to tripping temperatures for a given device. Thus a device with maximum possible VFD of 735 mV at 25_C will cycle between 170_C and 160_C respectively for MOSFET turn-off and turn-on as described above. A device with a minimum possible VFD of 675 mV at 25_C will cycle between 135_C and 125_C. In this manner, the self-protecting feature remains active during fault conditions over the entire tolerance range of the part. This is the most important capability of the circuit for a successful application. VFD(max) 735 mV @IF = 250 mA VHYS = 20 mV VFD(min) 675 mV VFD(min) + VHYS 510 mV VHYS = 20 mV VREF 490 mV VHYS = 20 mV VFD(min) 470 mV VFD(max) 470 mV VFD(max) + VHYS 510 mV 25_C 125_C 135_C 160_C 170_C Junction Temperature (_C) FIGURE 7. Cyclic Operation Under Fault Condition Document Number: 71621 13-Jul-01 www.vishay.com 5 AN820 Vishay Siliconix APPENDIX A: BILL OF MATERIAL Item 1 2 3 4 5 6 7 8 Qty 1 1 2 1 1 1 1 2 Designator R1 R2 R3, R5 R4 R6 R7 C1 C2, C3 Part Type 200 kW 22 kW 18 kW 560 kW 560 W 2.4 kW 560 pF 0.1 mF Description Resistor, 0.1 W, 1% Resistor, 0.1 W, 1% Resistor, 0.1 W, 5% Resistor, 0.1 W, 1% Resistor, 0.1 W, 5% Resistor, 0.1 W, 1% Capacitor, Ceramic, 25 V Capacitor, Ceramic, 25 V Temperature Sense MOSFET IC, Low Voltage Op Amp Footprint 805 805 805 805 805 805 805 805 Part Number CRCW08052003F CRCW08052202F CRCW0805183J CRCW0805564F CRCW0805561J CRCW0805242F VJ0805Y561JXAA VJ0805Y104JXAA Manufacturer Vishay Dale Vishay Dale Vishay Dale Vishay Dale Vishay Dale Vishay Dale Vishay Vitramon Vishay Vitramon 9 1 Q1 40 V D2PAK SUB60N04-15LT Vishay Siliconix 10 1 U1 LMV321M5 SC70-5 Multi-Source APPENDIX B: VISHAY SILICONIX TEMPERATURE SENSING POWER MOSFETS Device Number SUB60N04-15LT SUB50N04-07LT SUB50P05-13LT SUC75N04-04T Gender N-Channel N-Channel P-Channel N-Channel Breakdown Voltage (V) 40 40 50 30 Maximum On-Resistance (mW) 15 7 13 4 Maximum ID (A) 60 50 50 75 Package D2PAK D2PAK D2PAK Die Form Note: For current products visit the Vishay website. www.vishay.com 6 Document Number: 71621 13-Jul-01 |
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